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Ί * Metal Oxide Semiconductors (MOS) * Ί
Ί -------------------------------- Ί
Ί By LW1DSE Ί
ΘΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΝΌ
( Best if viewed with CP 437 )
Part 1/1
The metal-oxide-semiconductor field-effect transistor (MOSFET, MOS-FET,
or MOS FET) is by far the most common field-effect transistor in both digital
and analog circuits. The MOSFET is composed of a channel of n-type or p-type
semiconductor material, and is accordingly called an NMOSFET or a PMOSFET
(also commonly nMOSFET, pMOSFET).
The 'metal' in the name is often incorrect as current process
technologies usually use polysilicon gates. Aluminium was used as the gate
material until the 1980s when polysilicon became dominant owing to its
capability to form self-aligned gates. Lately, at the 65nm node and smaller,
metal gates are again in use. IGFET is a related, more general term meaning
insulated-gate field-effect transistor, and is almost synonymous with MOSFET,
though it can refer to FETs with a gate insulator that isn't oxide. Some
prefer to use "IGFET" when referring to devices with polysilicon gates, but
most still call them MOSFETs. With the new generation of high-k technology
that Intel and IBM have announced, metal gates in conjunction with the high-k
dielectric material replacing the silicon dioxide are making a comeback
replacing the polysilicon due to leakage problems in processes at about 65nm
or smaller.
Usually the semiconductor of choice is silicon, but some chip
manufacturers, most notably IBM, have begun to use a mixture of silicon and
germanium (Si-Ge) in MOSFET channels. Unfortunately, many semiconductors with
better electrical properties than silicon, such as gallium arsenide, don't
form good gate oxides and thus aren't suitable for MOSFETs. Yet, there has
been constant research to deposit oxides with acceptable electrical
characteristics on such material.
The gate terminal in the current generation (65 nanometer node) of
MOSFETs is a layer of polysilicon (polycrystalline silicon; why polysilicon
is used will be explained below) placed over the channel, but separated from
the channel by a thin insulating layer of what was traditionally silicon
dioxide, but more advanced technologies used silicon oxynitride. Some
companies have started to introduce a high-k + metal gate combination in the
45 nanometer node. When a voltage is applied between the gate and source
terminals, the electric field generated penetrates through the oxide and
creates a so-called "inversion channel" in the channel underneath. The
inversion channel is of the same type - P-type or N-type - as the source and
drain, so it provides a conduit through which current can pass. Varying the
voltage between the gate and body modulates the conductivity of this layer
and makes it possible to control the current flow between drain and source.
ΪΔΔΔΔΔΒΔΔΔΔΔΔΏ
³\ ³ ³ Fig 1: MOSFET structure.
Drain ΔΔΔΔ>³ ³ ³ ³
³/N+ ³ ³
³ ³ ³
³³ ³ ³
Gate ΔΔΔΔ΄³ P ³ N ³
³³ ³ ³
³ ³ ³
³\ ³ ³<ΔΔΔΔΔΔ Substrate
Source ΔΔΔΔ>³ ³ ³ ³ (to be connected
³/ ³ ³ to source)
³ N+ ³ ³
ΐΔΔΔΔΔΑΔΔΔΔΔΔΩ
N+ means very dopped zones.
N,P means low dropped zones.
Joint Drain to Source forms the intrinsic MOSFET diode.
Contents
1) Circuit symbols
2) MOSFET operation
2.1) Metal-oxide-semiconductor structure
2.2) MOSFET structure
2.3) Modes of operation
2.4) Body effect
3) The primacy of MOSFETs
3.1) Digital
3.2) Analog
4) MOSFET scaling
4.1) Reasons for MOSFET scaling
4.2) Difficulties arising due to MOSFET scaling
4.2.1) Subthreshold conduction
4.2.2) Interconnect capacitance
4.2.3) Heat production
4.2.4) Gate oxide leakage
4.2.5) Process variations
5) MOSFET construction
5.1) Gate material
6) Other MOSFET types
6.1) Dual gate MOSFET
6.2) Depletion-mode MOSFETs
6.3) NMOS logic
6.4) Power MOSFET
6.5) DMOS
7) MOSFET analog switch
7.1) Single-type MOSFET switch
7.2) Dual-type (CMOS) MOSFET switch
1) Circuit symbols
A variety of symbols are used for the MOSFET. The basic design is
generally a line for the channel with the source and drain leaving it at
right angles and then bending back into the same direction as the channel.
Sometimes a broken line is used for enhancement mode and a solid one for
depletion mode, but the awkwardness of drawing broken lines means this
distinction is often ignored. Another line is drawn parallel to the channel
for the gate.
Drain D
³ ³
ΗΔΔΩ N channel ΗΔΔΩ P channel
ΔΔΔ¶<ΔΏ G ΔΔΔ¶Δ>Ώ
Gate ΗΔΔ΄ ΗΔΔ΄
³ ³
Source S
MOSFET's
==================================================================
Drain D
³ ³
ΗΔΔΩ N channel ΗΔΔΩ P channel
ΔΔ>Ί G ΔΔ<Ί
Gate ΗΔΔΏ ΗΔΔΏ
³ ³
Source S
JFET's
Fig. 2: MOSFET & JFET
simbols
The bulk connection, if shown, is shown connected to the back of the
channel with an arrow indicating PMOS or NMOS. Arrows always point from P to
N, so an NMOS (N-channel in P-well or P-substrate) has the arrow pointing in.
If the bulk is connected to the source (as is generally the case with
discrete devices) it is angled to meet up with the source leaving the
transistor. If the bulk isn't shown (as is often the case in IC design as
they are generally common bulk) an inversion symbol is sometimes used to
indicate PMOS, alternatively an arrow on the drain may be used in the same
way as for bipolar transistors (out for NMOS in for PMOS).
For the symbols in which the bulk, or body, terminal is shown, it is
here shown internally connected to the source. This is a typical
configuration, but by no means the only important configuration. In general,
the MOSFET is a four-terminal device, and in integrated circuits many of the
MOSFETs share a body connection, not necessarily connected to the source
terminals of all the transistors.
2) MOSFET operation
2.1) Metal-oxide-semiconductor structure
A traditional metal-oxide-semiconductor (MOS) structure is obtained by
depositing a layer of silicon dioxide and a layer of metal (polycrystalline
silicon is commonly used instead of metal) on top of a semiconductor die. As
the silicon dioxide is a dielectric material its structure is equivalent to a
plane capacitor, with one of the electrodes replaced by a semiconductor.
When a voltage is applied across a MOS structure, it modifies the
distribution of charges in the semiconductor. If we consider a P-type
semiconductor (with NA the density of holes), a positive VGB (see figure)
tends to reduce the concentration of holes and increase the concentration of
electrons. If VGB is high enough, the concentration of negative charge
carriers near the gate is more than that of positive charges, in what is
known as an inversion layer.
This structure with P-type body is the basis of the N-type MOSFET,
which requires the addition of an N-type source and drain regions.
A metal-oxide-semiconductor field-effect transistor (MOSFET) is based
on the modulation of charge concentration caused by a MOS capacitance. It
includes two terminals (source and drain) each connected to separate highly
doped regions. These regions can be either P or N type, but they must both be
of the same type. The highly doped regions are typically denoted by a '+'
following the type of doping (see the image at the top). These two regions
are separated by a doped region of opposite type, known as the body. This
region isn't highly doped, denoted by the lack of a '+' sign. The active
region constitutes a MOS capacitance with a third electrode, the gate, which
is located above the body and insulated from all of the other regions by an
oxide.
If the MOSFET is an N-Channel or nMOS FET, then the source and drain
are 'N+' regions and the body is a 'P' region. When a positive gate-source
voltage is applied, it creates an N-channel at the surface of the P region,
just under the oxide (see fig. 3), by depleting this region of holes. This
channel extends between the source and the drain, but current is conducted
through it only when the gate potential is high enough to attract electrons
from the source into the channel. When zero or negative voltage is applied
between gate and source, the channel disappears and no current can flow
between the source and the drain.
ΪΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΏ
³ <--- ID ---< ²
³ ΪΔΔΔΔΔΒΔΔΔΔΔΔΏ ² Rl
³ ³\ ³ ³ + ³
Drain ΐΔΔΔΔ>³ ³ ³ ³ ΔΔΑΔΔ
³/N+ ³ ³ άάά VDD
³°| ³ ³ - ³
+³³°| ³ ³ Α
ΪΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔΔ΄³°| P ³ N ³ Gnd
+ ³ Gate +³³°| ³ ³
ΔΔΑΔΔ ³°| ³ ³
άάά ³\ ³ ³ ° =>"N Channel": induced by
- ³ Source ΪΔΔΔΔ>³ ³ ³ ³ positive gate to source
Α ³ ³/ ³ ³ voltage: MOSFET opened
Gnd ³ ³ N+ ³ ³
³ ΐΔΔΔΔΔΑΔΔΔΔΔΔΩ
Α Fig 3: MOSFET whit positive
Gnd voltages at Drain
and Gate to the Source
If the MOSFET is a P-Channel or pMOS FET, then the source and drain are
'P+' regions and the body is a 'N' region. When a negative gate-source voltage
(positive source-gate) is applied, it creates a P-channel at the surface of
the N region, just under the oxide, by depleting this region of electrons.
This channel extends between the source and the drain, but current is
conducted only when the gate potential is low enough to attract holes from
the source into the channel. When a near-zero or positive voltage is applied
between gate and body, the channel disappears and no current can flow between
the source and the drain. (See fig 3, but the polarities reversed)
The source is so named because it is the source of the charge carriers
(electrons for N-channel, holes for P-channel) that flow through the channel;
similarly, the drain is where the charge carriers leave the channel.
2.3) Modes of operation
The operation of a MOSFET can be separated into three different modes,
depending on the voltages at the terminals. For an enhancement-mode,
n-channel MOSFET the modes are:
a) Cut-off or sub-threshold mode: When VGS < Vth where Vth is the threshold
-----------------------------
voltage of the device.
According to the basic threshold model, the transistor is turned off,
and there is no conduction between drain and source. In reality, the
Boltzmann distribution of electron energies allows some of the more energetic
electrons at the source to enter the channel and flow to the drain, resulting
in a subthreshold current that is an exponential function of gate-source
voltage. While the current between drain and source should ideally be zero
when the transistor is being used as a turned-off switch, there is a
weak-inversion current, sometimes called subthreshold leakage.
b) Triode or linear region: When VGS > Vth and VDS < (VGS - Vth)
-----------------------
The transistor is turned on, and a channel has been created which
allows current to flow between the drain and source. The MOSFET operates like
a resistor, controlled by the gate voltage relative to both the source and
drain voltages. The transition from the exponential subthreshold region to
the triode region isn't so sharp.
c) Saturation: When VGS > Vth and VDS > VGS - Vth
----------
The switch is turned on, and a channel has been created, which allows
current to flow between the drain and source. Since the drain voltage is
higher than the gate voltage, a portion of the channel is turned off. The
onset of this region is also known as pinch-off. The drain current is now
relatively independent of the drain voltage (in a first-order approximation)
and the current is controlled by only the gate-source voltage.
When the channel length becomes very short, carrier transport will be
by quasi-ballistic transport. When short-channel effects dominate, the I-V
characteristics are no longer well approximated by equations. Rather, the
saturation drain current is more nearly linear than quadratic in VGS.
2.4) Body effect
The body effect describes the changes in the threshold voltage by the
change in the source-bulk voltage.
The body can be operated as a second gate, and is sometimes referred to
as the "back gate"; the body effect is sometimes called the "back-gate
effect".
3) The primacy of MOSFETs
In 1960, Dawon Kahng and Martin Atalla at Bell Labs invented the metal
oxide semiconductor field-effect transistor (MOSFET). Theoretically different
from Shockley's transistor, the MOSFET was structured by putting an
insulating layer on the surface of the semiconductor and then placing a
metallic gate electrode on that. It used crystalline silicon for the semi-
conductor and a thermally oxidized layer of silicon dioxide for the insulator.
Not only did it possess such technical attractions as low cost of production
and ease of integration, the silicon MOSFET didn't generate localized
electron traps (interface states) at the interface between the silicon and its
native oxide layer, and thus was free of the characteristic that had impeded
the performance of earlier transistors. Buoyed by this stroke of good fortune,
the MOSFET has achieved electronic hegemony. It is this serendipity that
sustains the large-scale integrated circuits (LSIs) underlying today's
information society.
3.1) Digital
The growth of digital technologies like the microprocessor has provided
the motivation to advance MOSFET technology faster than any other type of
silicon-based transistor. The principal reason for the success of the MOSFET
was the development of digital CMOS (Complementary MOS) logic, which uses p-
and n-channel MOSFETs as building blocks. The great advantage of CMOS logic
is that they allow no current to flow (ideally), and thus no power to be
consumed, except when the inputs to logic gates are being switched. CMOS
accomplishes this by complementing every nMOSFET with a pMOSFET and connecting
both gates and both drains together (see fig. 4). A high voltage on the gates
will cause the nMOSFET to conduct and the pMOSFET not to conduct and a low
voltage on the gates causes the reverse. During the switching time the
voltage goes from one state to another and both will conduct briefly. This
arrangement greatly reduces power consumption and heat generation. Overheating
is a major concern in integrated circuits, since ever more
transistors are packed into ever smaller chips.
VDD
Β
³
ΗΔΔ΄
ΪΔΔΔ¶Δ>Ω P channel
³ ΗΔΔΏ Fig 4: An CMOS inverter;
³ ³ __ like an HCF4069U
IN ΔΔΔ΄ ΓΔΔΔΔ OUT = IN or 74HC04U
³ ³
³ ΗΔΔΩ N channel
ΐΔΔΔ¶<ΔΏ
ΗΔΔ΄
³
Α
GND
Another advantage of MOSFETs for digital switching is that the oxide
layer between the gate and the channel prevents DC current from flowing
through the gate, further reducing power consumption and giving a very large
input impedance. The insulating oxide between the gate and channel
effectively isolates a MOSFET in one logic stage from earlier and consequent
stages, which allows it to drive a considerable number of MOSFET inputs from
a single MOSFET output. Bipolar transistor-based logic (such as TTL) don't
have such a high fanout capacity. This isolation also makes it easier for the
designers to ignore to some extent loading effects between logic stages
independently. That extent is defined by the operating frequency: as
frequencies increase, the input impedance of the MOSFETs decreases.
To be continued in part 2/2.
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Ί Compilled from Wikipedia.com . Translatted to ASCII by LW1DSE Osvaldo Ί
Ί F. Zappacosta. Barrio Garay, Almirante Brown, Buenos Aires, Argentina. Ί
Ί Made with MSDOS 7.10's Text Editor (edit.com) in my AMD's 80486. Ί
Ί November 11, 2007 Ί
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Ί Osvaldo F. Zappacosta. Barrio Garay (GF05tf) Alte. Brown, Bs As, Argentina.Ί
Ί Mother UMC ζPC:AMD486@120MHz, 16MbRAM HD IDE 1.6Gb MSDOS 7.10 TSTHOST1.43C Ί
Ί Bater΅a 12V 160AH. 9 paneles solares 10W. Ί
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