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G8MNY  > TECH     11.03.08 03:00l 85 Lines 3612 Bytes #999 (0) @ WW
BID : 49706_GB7CIP
Read: GUEST
Subj: Darlington & Quasi Darlington
Path: IZ3LSV<IW2OHX<OE6XPE<DB0RES<ON0AR<GB7CIP
Sent: 080311/0003Z @:GB7CIP.#32.GBR.EU #:49706 [Caterham] $:49706_GB7CIP
From: G8MNY@GB7CIP.#32.GBR.EU
To  : TECH@WW

By G8MNY                                        (Updated May 06)
(8 Bit ASCII Graphics use code page 437 or 850)
This simple way to improve the current gain of a transistor just use 2 in
cascade, often used in PSUs & AF output stages & even the odd RF signal amp.
Two separate devices can be used or in a single package.

NORMAL           Collector
DARLINGTON   ÚÄÄÄÄ´    /|\
        T1 ³/     ³     |
Base  ÄÄÄÄÄ´      ³    1V         Current
       /|\ ³\e  ³/   Saturated     Gain HFE  = T1 x T2
        |    ÀÄÄ´ T2    |
    1-1.5V      ³\e     |
        À - - ->  ³    \|/
                 Emitter

This method has the 2 transistors of the same type, & has the disadvantage of
higher bias voltage.

QUASI             ³ Collector!
DARLINGTON      ³/e      /|\
       NPN   ÚÄÄ´ T2      |
        T1 ³/   ³\ PNP   1V
Base ÄÄÄÄÄÄ´      ³    Saturated    Gain HFE = T1 x T2
      /|\  ³\e    ³       |
      0.6V   ÀÄÄÄÄ´      \|/
       À - - ->   ³ Emitter

This is often used where T1 is a PNP & T2 is a cheaper high power NPN.

To speed up the 2nd transistor turn off, a low ê is often used base to emitter
in either configuration.

AS USED IN A PUSH PULL AMP
                              DARLINGTON              3A
 Quasi          ÚÄÄÄÄÂÄÄRbsÄÄÄÂÄÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄo-oÄÄÄÄÄÄÂÄÄÄÄ<+70V
 Complementary  ³   Rc      ³/ T3      ³             Fuse      ³  From Bridge
 Class B Output ³    ÃÄÄÄÄÄÄ´ NPN      ³                      +³   Rectifier
               ===   ³  6mA ³\e      ³/ T5                    ===
             Cbs³   _³_       ÃÄÄÄÄÄÄ´ NPN               Cpower³  e.g. 50V @ 2A
                ³   \_/ D1    ³   .2A³\e                       ³   transformer
                ³    ³Bias   100ê      ³                       ³
                ³    ³        ³        Re     4A Pk            ³
            ÚÄÄÂÁÄÄÄÄ)ÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÂÄÄÄÄÄ¿         ³
          Rnfb ³    _³_ D2             Re      ³u1   ³+        ³
            ³+ ³    \_/       ÚÄÄÄÄÄÄÄÄ´      ===   === Cls    ³
           === ³     ³      ³/e T2     ³       ³     ³         ³
        Cnfb³  Rb    ÃÄÄÄÄÄÄ´ PNP      ³       ³    ÚÁ¿/³LS    ³
            ³  ³   ³/       ³\       ³/ T4    8ê    ÀÂÙ\³8ê    ³
AF>ÄÄRinÄ´ÃÄÁÄÄÁÄÄÄ´NPN       ÃÄÄÄÄÄÄ´ NPN    1W     ³ 50W RMS ³
Input    Cin    T1 ³\e       100ê    ³\e       ³     ³         ³
   ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÁÄÄÄÄÄÄÄÄÄÁÄÄÄÄ<0v
        CLASS A STAGE    QUASI COMPLIMENT    ZOBAL   LOAD

COMPONENT VALUES
Input Z = Rin,  e.g. 10k
XCin = Rin @ 10Hz,  e.g. 2uF
Rb sets 35V on output, ((Rc+Rs) x T1Hfe), e.g. 330k
Gain = (Rnfb//Rb)/Rin, e.g. 10x = 150k
XCnfb = Rnfb @ < 10Hz, e.g. 1uF
T1= 100mA 100v 100x 1W NPN device
T2 & T3 = 1A 100V 30x 5W, e.g. TIP29/30
T4 & T5 = 15A 100V 20x 115W on heatsink, e.g. 2N3055
100ê in T4 & 5 base-emitter, ensure they turn off properly.
D1 & D2 drop the 1.3V needed to just under bias outputs, e.g. 1N4148
Re maintain thermal stability, e.g. 0.22ê 2W
Rc sets the peak +ve output current (e.g. « x LS x T5Hfe x T3Hfe) e.g. 2k2 2W
Cbs & Rbs make a bootstrap to maintain current through Rc.
 Rbs = Rc/2  e.g. 1k 1W
 XCbs = Rbs @ < 10Hz  e.g. 30uF @ 50V
XCls = LS @ < 10Hz  e.g. 1000uF @ 50V
XCpower = LS @ < 20Hz, assuming 100Hz supply from bridge, e.g. 4700uF @ 80V
Zobal network keeps the O/P terminated at HF when the LS is O/C, for stability.

In practice there would be more gain stages in front providing 3V RMS drive &
more N.F.B. for lower overall distortion, but this circuit should work OK.


Why don't U send an interesting bul?

73 De John, G8MNY @ GB7CIP


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